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FV524RX366 128 Q827ES / MALAY / L844001Q-0770 '98 This engineering sample is a sample of a PPGA Celeron. Built with the 0.25 µm process used for P2 Deschutes, this Celeron features an L2 cache of 128 KB and a front side bus clocked at 66 MHz. This sample comes with a CPUID of 665h like commercial 366 MHz Celeron. It was built in late October 1998. Intel announced the Celeron 366 on January, 4th 1999